Multichip dual write
US9952784B2 · kind B2 · utility
6Cited by
3References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2015 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | May 18, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Identical data is written to multiple nonvolatile memory chips connected to a memory bus by sending address information to a first nonvolatile memory chip and a second nonvolatile memory chip, selecting the first and second nonvolatile memory chips, while the first nonvolatile and second nonvolatile memory chips are both selected, sending user data over the memory bus to the first and second nonvolatile memory chips in parallel, and programming the user data in the first nonvolatile memory chip and the second nonvolatile memory chip in parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.