Transient voltage suppressor apparatus
US9954355B1 · kind B1 · utility
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4Claims
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Assignee
Inventor
Key dates
| Filing date | Feb 22, 2017 |
| Grant date | Apr 24, 2018 |
| Priority date | — |
| Expiry date | Feb 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30205
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transient voltage suppressor (TVS) apparatus includes a plurality of input/output (I/O) pins, a plurality of ground pins, and a substrate. The substrate includes a plurality of division parts and a carrier part. The carrier part carries a chip. The division parts are disposed between each of the I/O pins and the ground pins. The chip is electrically connected to the I/O pins and the ground pins, and the division parts are electrically insulated from the I/O pins and the ground pins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.