Method and apparatus for clock phase generation

US9954539B2 · kind B2 · utility

Assignee

• XILINX, INC. · US

Inventors

• Jinyung Namkoong · San Jose, US
• Mayank Raj · San Jose, US
• Parag Upadhyaya · Los Gatos, US
• Vamshi Manthena · Langen, DE
• Catherine Hearne · Fermoy, IE
• Marc Erett · Ballincollig, IE

Key dates

• Filing date: Jul 11, 2016
• Grant date: Apr 24, 2018
• Expiry date: Jul 11, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03M9/00
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A method, non-transitory computer readable medium, and circuit for clock phase generation are disclosed. The circuit includes an injection locked oscillator, a loop controller, and a phase interpolator. The injection locked oscillator includes an input for receiving an injected clock signal and an output for forwarding a set of fixed clock phases. The loop controller includes an input for receiving a phase separation error of the fixed clock phases and an output for forwarding a supply voltage derived from the phase separation error. The supply voltage matches the free running frequency of the injection locked oscillator to a frequency of the injected clock signal. The phase interpolator includes an input for receiving the set of fixed clock phases directly from the injection locked oscillator, an input for receiving the supply voltage from the loop controller, and an output for forwarding an arbitrary clock phase.