Semiconductor memory device

US9960173B2 · kind B2 · utility

Assignee

• TOSHIBA MEMORY CORPORATION · JP

Inventor

• Yoshiro Shimojo · Yokohama, JP

Key dates

• Filing date: Mar 10, 2017
• Grant date: May 1, 2018
• Expiry date: Mar 10, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B43/50

Abstract

According to one embodiment, a semiconductor memory device includes: a substrate; a first interconnect; a second interconnect; a plurality of third interconnects; a fourth interconnect; a semiconductor member; a charge storage member; and a conductive member. One of the plurality of third interconnects is disposed on two second-direction sides of the conductive member. Portions of the one of the plurality of third interconnects disposed on the two second-direction sides of the conductive member are formed as one body.