Error checking in out-of-order task scheduling
US9965321B2 · kind B2 · utility
2Cited by
4References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2011 |
| Grant date | May 8, 2018 |
| Priority date | — |
| Expiry date | Dec 17, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4843
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention sets forth a technique for error-checking a compute task. The technique involves receiving a pointer to a compute task, storing the pointer in a scheduling queue, determining that the compute task should be executed, retrieving the pointer from the scheduling queue, determining via an error-check procedure that the compute task is eligible for execution, and executing the compute task.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.