Semiconductor device manufacturing method
US9966311B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 11, 2016 |
| Grant date | May 8, 2018 |
| Priority date | — |
| Expiry date | Apr 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device manufacturing method according to an embodiment including partially forming a first groove on a nitride semiconductor layer provided on a first plane of a substrate having first and second planes by etching so that the substrate is exposed, forming a second groove on the substrate exposed inside the first groove so that a portion of the substrate remains, removing the substrate from the second plane side so that the second groove is not exposed, thinning the substrate, forming a metal film on the second plane side of the substrate, removing the metal film in a portion where the second groove is formed, and forming a third groove on the substrate in the portion where the second groove is formed so that the second groove is exposed from the second plane side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.