Integrated circuit package substrate with microstrip architecture and electrically grounded surface conductive layer

US9972589B1 · kind B1 · utility

Assignee

• Intel Corporation · US

Inventors

• Eng Huat Goh · Air Itam, MY
• Min Suet Lim · Kampung Bukit Kechil, MY
• Jiun Hann Sir · Air Itam, MY
• Seok Ling Lim · Kulim, MY
• Hoay Tien Teoh · Air Itam, MY

Key dates

• Filing date: Mar 30, 2017
• Grant date: May 15, 2018
• Expiry date: Mar 30, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01P3/082
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Described herein are integrated circuit structures having a package substrate with microstrip architecture as the uppermost layers and a surface conductive layer that is electrically connected to a ground plane internal to the package substrate, as well as related devices and methods. In one aspect of the present disclosure, an integrated circuit package substrate may have an internal ground plane, a dielectric layer, a microstrip signal layer as the top transmission line layer, a solder resist layer, and a surface conductive layer that is electrically connected to the internal ground plane in the package substrate. In another aspect of the present disclosure, an integrated circuit package substrate may include altering thicknesses of the dielectric and/or solder resist layers to optimize electrical performance by having the microstrip signal layer closer in proximity to the internal ground layer as compared to the surface conductive layer.