Semiconductor device
US9978459B2 · kind B2 · utility
0Cited by
12References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 21, 2015 |
| Grant date | May 22, 2018 |
| Priority date | — |
| Expiry date | Sep 2, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a memory array including a plurality of memory blocks, wherein the memory blocks are grouped into sub-block groups, and the sub-block groups are grouped into main block groups; an operation circuit suitable for performing a read operation and a test read operation on memory cells included in the memory block; and a read counter suitable for counting a first number of read operations for each word line in the respective main block groups and a second number of read operations for the respective sub-block groups.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.