Interconnection of semiconductor devices in extreme environment microelectronic integrated circuit chips
US9978686B1 · kind B1 · utility
0Cited by
17References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2017 |
| Grant date | May 22, 2018 |
| Priority date | — |
| Expiry date | Feb 21, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/035
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process of fabrication and the resulting integrated circuit device is made of patterned metal electrical interconnections between semiconductor devices residing on and forming extremely harsh environment integrated circuit chips. The process enables more complicated wide band gap semiconductor integrated circuits with more than one level of interconnect to function for prolonged time periods (over 1000 hours) at much higher temperatures (500 C).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.