Semiconductor package and method of fabricating the same
US9978694B2 · kind B2 · utility
8Cited by
8References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2017 |
| Grant date | May 22, 2018 |
| Priority date | — |
| Expiry date | Apr 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are a semiconductor package and a method of fabricating the same. The semiconductor package includes a first substrate, and a first semiconductor chip positioned above the first substrate. A second semiconductor chip is positioned above a top surface of the first semiconductor chip. An adhesive layer is between the first semiconductor chip and the second semiconductor chip. A second substrate is disposed on the second semiconductor chip. The second substrate substantially covers a top surface of the second semiconductor chip. A mold layer is disposed between the first substrate and the second substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.