Method and apparatus for improved thread selection
US9983880B2 · kind B2 · utility
1Cited by
10References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2014 |
| Grant date | May 29, 2018 |
| Priority date | — |
| Expiry date | Jun 9, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/684
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method are described for improved thread selection. For example, one embodiment of a processor comprises: first logic to maintain a history table comprising a plurality of entries, each entry in the table associated with an instruction and including history data indicating prior hits and/or misses to a cache level and/or a translation lookaside buffer (TLB) for that instruction; and second logic to select a particular thread for execution at a particular processor pipeline stage based on the history data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.