Josep M. Codina
12Patents
4h-index
36Co-inventors
52Inventor score
Filing activity: Oct 27, 2006 → Dec 8, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8612698B2 | Replacement policy for hot code detection | Physics | 14 | Active |
| US7895415B2 | Cache sharing based thread control | Physics | 14 | Active |
| US8261046B2 | Access of register files of other threads using synchronization | Physics | 11 | Active |
| US8909902B2 | Systems, methods, and apparatuses to decompose a sequential program into multiple threads, execute said threads, and reconstruct the sequential execution | Physics | 8 | Active |
| US9940138B2 | Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculations | Physics | 4 | Active |
| US9811341B2 | Managed instruction cache prefetching | Physics | 3 | Active |
| US8190652B2 | Achieving coherence between dynamically optimized code and original code | Physics | 3 | Active |
| US8898646B2 | Method and apparatus for flexible, accurate, and/or efficient code profiling | Physics | 1 | Active |
| US10621092B2 | Merging level cache and data cache units having indicator bits related to speculative execution | Physics | 1 | Active |
| US9983880B2 | Method and apparatus for improved thread selection | Physics | 1 | Active |
| US10013326B2 | Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code region | Physics | 1 | Active |
| US10157063B2 | Instruction and logic for optimization level aware branch prediction | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.