Method for processing a carrier
US9984930B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2016 |
| Grant date | May 29, 2018 |
| Priority date | — |
| Expiry date | Jun 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for processing a carrier may include: forming a plurality of structure elements at least one of over and in a carrier, wherein at least two adjacent structure elements of the plurality of structure elements have a first distance between each other; depositing a first layer over the plurality of structure elements having a thickness which equals the first distance between the at least two adjacent structure elements; forming at least one additional layer over the first layer, wherein the at least one additional layer covers an exposed surface of the first layer; removing a portion of the at least one additional layer to expose the first layer partially; and partially removing the first layer, wherein at least one sidewall of the at least two adjacent structure elements is partially exposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.