Active pattern structure and semiconductor device including the same
US9985025B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2017 |
| Grant date | May 29, 2018 |
| Priority date | — |
| Expiry date | Apr 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An active pattern structure may include a substrate including an active pattern array defined by a plurality of trenches including first to third trenches, and first to third isolation patterns in the first to third trenches, respectively. The active pattern array may include a plurality of first and second active patterns extending in a first direction, and the first to third trenches may be between the first and second active patterns and may include different widths from each other. The active pattern array may include an active pattern group including one of the first active patterns and one of the second active patterns sequentially arranged in a second direction substantially perpendicular to the first direction. Each of the first and second active patterns may have a minute width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.