Semiconductor memory device
US9985204B2 · kind B2 · utility
2Cited by
10References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2017 |
| Grant date | May 29, 2018 |
| Priority date | — |
| Expiry date | Mar 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
Abstract
A semiconductor memory device including first lines and second lines overlapping and intersecting each other, variable resistance memory elements disposed at intersections between the first lines and the second lines, and switching elements disposed between the variable resistance memory elements and the first lines. At least one of the switching elements includes first and second chalcogenide compound layers, and conductive nano-dots disposed between the first and second chalcogenide compound layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.