Systems and methods for handling sudden power failures in solid state drives
US9990023B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2016 |
| Grant date | Jun 5, 2018 |
| Priority date | — |
| Expiry date | Nov 25, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/81
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for handling sudden power failures in non-volatile memory devices such as solid state drives are provided by having the non-volatile memory device boot up in a low power write mode, which limits substantially all programming operations to a single level cell (SLC) mode, as opposed to a normal mode in which the programming operations can be performed in a multi-level cell (MLC) mode. Thus, if the system experiences a sudden power failure when it is being powered solely by AC derived power and the battery is below a level sufficient for powering the device while it is programming in the SLC mode, data integrity will be preserved because the programming operation was being performed in SLC mode. The non-volatile memory device may be permitted to exit out the low power write mode into the normal mode when the charge level of the battery is sufficient for powering the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.