Inventor · San Jose, CA, US

Alexander Paley

22Patents
7h-index
25Co-inventors
65Inventor score

Filing activity: Mar 9, 2006 → Jan 20, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US8094500B2 Non-volatile memory and method with write cache partitioning Physics 54 Active
US8244960B2 Non-volatile memory and method with write cache partition management methods Physics 53 Active
US8886990B2 Block management schemes in hybrid SLC/MLC memory Physics 24 Active
US7275140B2 Flash memory management method that is resistant to data corruption by power loss Physics 21 Expired
US8700840B2 Nonvolatile memory with write cache having flush/eviction methods Emerging Cross-Sectional Technologies 20 Active
US8250333B2 Mapping address table maintenance in a memory device Physics 17 Active
US7389397B2 Method of storing control information in a large-page flash memory device Physics 16 Active
US9990023B2 Systems and methods for handling sudden power failures in solid state drives Physics 7 Active
US9053809B2 Data protection from write failures in nonvolatile memory Physics 5 Active
US10379949B2 Techniques for managing parity information for data stored on a storage device Physics 2 Active
US11544159B2 Techniques for managing context information for a storage device while maintaining responsiveness Physics 1 Active
US11256436B2 Systems and methods for balancing multiple partitions of non-volatile memory Physics 1 Active
US10853199B2 Techniques for managing context information for a storage device while maintaining responsiveness Physics 1 Active
US11579789B2 Techniques for managing context information for a storage device Physics 0 Active
US11494107B2 Managing parity information for data stored on a storage device Physics 0 Active
US11094381B2 Rapid restart protection for a non-volatile memory system Physics 0 Active
US11132145B2 Techniques for reducing write amplification on solid state storage devices (SSDs) Physics 0 Active
US12236119B2 Systems and methods for balancing multiple partitions of non-volatile memory Physics 0 Active
US8806604B2 Methods for firewall protection of mass-storage devices Physics 0 Active
US10162561B2 Managing backup of logical-to-physical translation information to control boot-time and write amplification Physics 0 Active
US11972143B2 Techniques for balancing write commands on solid state storage devices (SSDs) Physics 0 Active
US9111648B2 Redundancy schemes for non-volatile memory based on physical memory layout Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.