Method of fabricating integrated circuit device by using slurry composition
US9991127B2 · kind B2 · utility
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1References
20Claims
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Key dates
| Filing date | Oct 6, 2016 |
| Grant date | Jun 5, 2018 |
| Priority date | — |
| Expiry date | Oct 6, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating an integrated circuit device may include forming a polishing stop layer and a semiconductor layer on a substrate, and selectively polishing the semiconductor layer from a surface which simultaneously exposes the polishing stop layer and the semiconductor layer, by using a slurry composition including a compound composition and polishing particles. The compound composition may include a sulfonate compound and a terminal amine group-including compound.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.