Semiconductor packages with heat dissipation layers and pillars and methods for fabricating the same
US9991245B2 · kind B2 · utility
2Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2015 |
| Grant date | Jun 5, 2018 |
| Priority date | — |
| Expiry date | Dec 3, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package comprising: a semiconductor chip; a connection pillar that is disposed adjacent to the semiconductor chip; a first heat dissipation layer disposed on the semiconductor chip; and a second heat dissipation layer disposed on the first heat dissipation layer, the second heat dissipation layer including a first protrusion extending beyond a perimeter of the semiconductor chip and extending towards the connection pillar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.