Method and apparatus for recovering from bad store-to-load forwarding in an out-of-order processor
US9996356B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2015 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Aug 15, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3865
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus and method for detecting and recovering from incorrect memory dependence speculation in an out-of-order processor are described herein. For example, one embodiment of a method comprises: executing a first load instruction; detecting when the first load instruction experiences a bad store-to-load forwarding event during execution; tracking the occurrences of bad store-to-load forwarding event experienced by the first load instruction during execution; controlling enablement of an S-bit in the first load instruction based on the tracked occurrences; generating a plurality of load operations responsive to an enabled S-bit in first load instruction, wherein execution of the plurality of load operations produces a result equivalent to that from the execution of the first load instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.