Semiconductor packages and methods of forming the same
US9997467B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2017 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Jan 17, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor packages and methods of forming the same are disclosed. Embodiments include forming a first recess in a first substrate, wherein a first area of an opening of the first recess is larger than a second area of a bottom of the first recess. The embodiments also include forming a first device, wherein a third area of a top end of the first device is larger than a fourth area of a bottom end of the first device. The embodiments also include placing the first device into the first recess, wherein the bottom end of the first device faces the bottom of the first recess, and bonding a sidewall of the first device to a sidewall of the first recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.