Semiconductor devices and methods of fabricating the same
US9997525B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 2017 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Jan 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device may include a first conductive pattern having a line portion and a pad portion connected to the line portion on a substrate, a gate insulating pattern and a second conductive pattern sequentially stacked on the substrate, and a capping layer disposed on the first and second conductive patterns. A first trench is defined in an upper portion of the substrate adjacent to one side of the second conductive pattern, and the capping layer at least partially fills the first trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.