Self-decap cavity fabrication process and structure
US9999134B2 · kind B2 · utility
1Cited by
38References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2016 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Mar 25, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1383
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A PCB having multiple stacked layers laminated together. The laminated stack includes regular flow prepreg and includes a recessed cavity, a bottom perimeter of which is formed by a photo definable, or photo imageable, polymer structure, such as a solder mask frame, and a protective film. The solder mask frame and protective film protect inner core circuitry at the bottom of the cavity during the fabrication process, as well as enable the use of regular flow prepreg in the laminated stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.