Method of forming a configuration of interconnections on a semiconductor device having a high integration density
USRE34583E · kind E · reissue
Assignee
Inventors
Key dates
| Filing date | May 11, 1992 |
| Grant date | Apr 12, 1994 |
| Priority date | — |
| Expiry date | May 11, 2012 |
Classification
- Technology area (CPC —)General
Abstract
A method of the kind consisting in that a contact is obtained with an active zone (11) carried by a semiconductor substrate (10) by means of conductive contact studs (18a) located in the contact openings (16c) of an isolating layer (12) and in that then a metallic configuration of interconnections (22) is formed establishing the conductive connection with the conductive contact studs (18a). A separation layer (13) is provided between the isolating layer (12) and the conductive layer (18), which can be eliminated selectively with respect to the islating layer (12). Thus, the isolating layer (12) retains its original flatness and the conductive contact studs (18a) have an upper level (20) exceeding slightly the level (21) of the isolating layer (12), thus favoring the contact between these contact studs (18a) and the metallic configuration of interconnections (22). Application in microcircuits having a high integration density.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.