Methods and apparatus for efficient synchronous MIMD operations with IVLIW PE-TO-PE communication
USRE41703E1 · kind E1 · reissue
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2004 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Jun 21, 2024 |
Classification
- Technology area (CPC —)General
Abstract
A SIMD machine employing a plurality of parallel processor (PEs) in which communications hazards are eliminated in an efficient manner. An indirect Very Long Instruction Word instruction memory (VIM) is employed along with execute and delimiter instructions. A masking mechanism may be employed to control which PEs have their VIMs loaded. Further, a receive model of operation is preferably employed. In one aspect, each PE operates to control a switch that selects from which PE it receives. The present invention addresses a better machine organization for execution of parallel algorithms that reduces hardware cost and complexity while maintaining the best characteristics of both SIMD and MIMD machines and minimizing communication latency. This invention brings a level of MIMD computational autonomy to SIMD indirect Very Long Instruction Word (iVLIW) processing elements while maintaining the single thread of control used in the SIMD machine organization. Consequently, the term Synchronous-MIMD (SMIMD) is used to describe the present approach.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.