Microcircuit package having ductile layer
USRE43807E1 · kind E1 · reissue
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Key dates
| Filing date | Jan 12, 2012 |
| Grant date | Nov 20, 2012 |
| Priority date | — |
| Expiry date | Jan 12, 2032 |
Classification
- Technology area (CPC —)General
Abstract
A microcircuit package having a ductile layer between a copper flange and die attach. The ductile layer absorbs the stress between the flange and semiconductor device mounted on the flange, and can substantially reduce the stress applied to the semiconductor device. In addition, the package provides the combination of copper flange and polymeric dielectric with a TCE close to copper, which results in a low stress structure of improved reliability and conductivity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.