Method and device for controlling memory
USRE50518E1 · kind E1 · reissue
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Key dates
| Filing date | Nov 18, 2021 |
| Grant date | Aug 5, 2025 |
| Priority date | — |
| Expiry date | Nov 18, 2041 |
Classification
- Technology area (CPC —)General
Abstract
A memory controller includes a dirty group detector configured to, in response to receiving a request for writing data to a memory, modify addresses of a cache group related to a physical address of the memory, increase counters corresponding to the modified addresses of the cache group, and detect whether the cache group is in a dirty state based on the counters; and a dirty list manager configured to manage the cache group in the dirty state and a dirty list including dirty bits according to a result of the detecting; wherein the dirty bits indicate whether a cache set included in the cache group is in the dirty state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.