Inventor · Sunnyvale, CA, US

Ali I. Sheikh

28Patents
8h-index
27Co-inventors
71Inventor score

Filing activity: May 13, 2004 → Dec 17, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US8428930B2 Page mapped spatially aware emulation of a computer instruction set Physics 21 Active
US8301434B2 Host cell spatially aware emulation of a guest wild branch Physics 20 Active
US8819647B2 Performance improvements for nested virtual machines Physics 16 Active
US7617493B2 Defining memory indifferent trace handles Physics 16 Active
US9158566B2 Page mapped spatially aware emulation of computer instruction set Physics 12 Active
US7661098B2 Computer program optimization in a dynamic compilation environment Physics 9 Active
US7716657B2 Compiler optimization with privatizing of a non-final object Physics 9 Active
US7596781B2 Register-based instruction optimization for facilitating efficient emulation of an instruction stream Physics 8 Active
US8768683B2 Self initialized host cell spatially aware emulation of a computer instruction set Physics 4 Active
US8447583B2 Self initialized host cell spatially aware emulation of a computer instruction set Physics 3 Active
US8869128B2 Compiling method, program, and information processing apparatus Physics 3 Active
US8639492B2 Accelerated execution for emulated environments Physics 3 Active
US9940218B2 Debugging optimized code using fat binary Physics 2 Active
US9858054B2 Method for optimizing binary code in language having access to binary coded decimal variable, and computer and computer program Physics 2 Active
US8364461B2 Reusing invalidated traces in a system emulator Physics 1 Active
US8387031B2 Providing code improvements for nested virtual machines Physics 1 Active
US9235420B2 Branch target buffer for emulation environments Physics 1 Active
US8612731B2 Branch target buffer for emulation environments Physics 1 Active
US8713289B2 Efficiently emulating computer architecture condition code settings without executing branch instructions Physics 1 Active
US8972704B2 Code section optimization by removing memory barrier instruction and enclosing within a transaction that employs hardware transaction memory Physics 1 Active
US11003453B2 Branch target buffer for emulation environments Physics 0 Active
US9280328B2 Method for optimizing binary code in language having access to binary coded decimal variable, and computer and computer program Physics 0 Active
US8949106B2 Just in time compiler in spatially aware emulation of a guest computer instruction set Physics 0 Active
US10534612B2 Hybrid polymorphic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environments Physics 0 Active
US8689198B2 Compiling system and method for optimizing binary code Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.