Inventor · Noida, IN

Ashish Hari

2Patents
1h-index
5Co-inventors
37Inventor score

Filing activity: Jun 27, 2006 → Jan 31, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US7536662B2 Method for recognizing and verifying FIFO structures in integrated circuit designs Physics 6 Active
US10635767B2 Glitch detection at clock domain crossing Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.