Chris Ellingham
3Patents
3h-index
3Co-inventors
36Inventor score
Filing activity: Dec 29, 1995 → Jun 3, 1999
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5903466A | Constraint driven insertion of scan logic for implementing design for test within an integrated circuit design | Physics | 97 | Expired |
| US6106568A | Hierarchical scan architecture for design for test applications | Physics | 82 | Expired |
| US5949692A | Hierarchical scan architecture for design for test applications | Physics | 49 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.