Inventor · Pembroke Pines, FL, US

Clarence K. Coffee

11Patents
7h-index
13Co-inventors
63Inventor score

Filing activity: Aug 17, 1998 → Dec 16, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US6160562A System and method for aligning an initial cache line of data read from local memory by an input/output device Physics 63 Expired
US6202101A System and method for concurrently requesting input/output and memory address space while maintaining order of data sent and returned therefrom Physics 43 Expired
US6272651A System and method for improving processor read latency in a system employing error checking and correction Physics 40 Expired
US6356972B1 System and method for concurrently requesting input/output and memory address space while maintaining order of data sent and returned therefrom Physics 22 Expired
US6209052A System and method for suppressing processor cycles to memory until after a peripheral device write cycle is acknowledged by the memory arbiter Physics 12 Expired
US6199118A System and method for aligning an initial cache line of data read from an input/output device by a central processing unit Physics 10 Expired
US6216190A System and method for optimally deferring or retrying a cycle upon a processor bus that is destined for a peripheral bus Physics 7 Expired
US10491235B1 Devices and methods for multi-mode sample generation Electricity 3 Active
US7376777B2 Performing an N-bit write access to an M×N-bit-only peripheral Physics 2 Expired
US11653193B1 Communication system and method for controlling access to portable radio public safety service applications Electricity 0 Active
US12120516B2 Dynamically enabling a security feature of a wireless communication device based on environmental context Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.