Daniel Kiss
4Patents
1h-index
21Co-inventors
37Inventor score
Filing activity: Mar 25, 2019 → Jul 19, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10746790B1 | Constrained pseudorandom test pattern for in-system logic built-in self-test | Physics | 5 | Active |
| US11989071B2 | Dynamic guard band with timing protection and with performance protection | Physics | 0 | Active |
| US11953982B2 | Dynamic guard band with timing protection and with performance protection | Physics | 0 | Active |
| US11940836B2 | Dual chip clock synchronization | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.