Elene Terry
6Patents
4h-index
12Co-inventors
46Inventor score
Filing activity: May 29, 2009 → May 5, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8797332B2 | Device discovery and topology reporting in a combined CPU/GPU architecture system | Physics | 7 | Active |
| US9747225B2 | Interrupt controller | Physics | 5 | Active |
| US9588902B2 | Flexible page sizes for virtual memory | Physics | 4 | Active |
| US8578129B2 | Infrastructure support for accelerated processing device memory paging without operating system integration | Physics | 4 | Active |
| US8489752B2 | Method and system for controlling bus access | Physics | 2 | Active |
| US9549100B2 | Low-latency timing control | Electricity | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.