Emiliano Morini
5Patents
0h-index
7Co-inventors
30Inventor score
Filing activity: Jan 19, 2018 → Nov 17, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10503852B2 | Formal verification of integrated circuit hardware designs to implement integer division | Physics | 0 | Active |
| US12353862B2 | Automatic code generation of optimized RTL via redundant code removal | Physics | 0 | Active |
| US12050532B2 | Routing circuit for computer resource topology | Physics | 0 | Active |
| US10796052B2 | Formal verification of integrated circuit hardware designs to implement integer division | Physics | 0 | Active |
| US11455451B2 | Verifying a hardware design for a component that implements a permutation respecting function | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.