Euibok Lee
4Patents
0h-index
8Co-inventors
27Inventor score
Filing activity: Aug 6, 2014 → Nov 1, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US12021027B2 | Integrated circuit device having parallel conductive lines with bulging end portion(s) and method of manufacturing the same | Electricity | 0 | Active |
| US9171755B2 | Methods of manufacturing semiconductor devices including capped metal patterns with air gaps in-between for parasitic capacitance reduction | Electricity | 0 | Active |
| US11488864B2 | Self-aligned supervia and metal direct etching process to manufacture self-aligned supervia | Electricity | 0 | Active |
| US12014951B2 | Semi-damascene structure with dielectric hardmask layer | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.