Hechen Wang
8Patents
1h-index
7Co-inventors
33Inventor score
Filing activity: Nov 13, 2018 → Dec 16, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10969431B1 | Error-tolerant architecture for power-efficient computing | Physics | 2 | Active |
| US10785075B2 | Radio frequency (RF) to digital polar data converter and time-to-digital converter based time domain signal processing receiver | Electricity | 1 | Active |
| US12341535B2 | Analog forward error correction | Electricity | 0 | Active |
| US12131245B2 | Bayesian neural network and methods and apparatus to operate the same | Physics | 0 | Active |
| US12254399B2 | Hierarchical hybrid network on chip architecture for compute-in-memory probabilistic machine learning accelerator | Physics | 0 | Active |
| US12154638B2 | Techniques for analog multibit data representation for in-memory computing | Physics | 0 | Active |
| US10958491B2 | Radio frequency (RF) to digital polar data converter and time-to-digital converter based time domain signal processing receiver | Electricity | 0 | Active |
| US11206163B2 | Radio frequency (RF) to digital polar data converter and time-to-digital converter based time domain signal processing receiver | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.