Jee Ho Ryoo
7Patents
3h-index
8Co-inventors
42Inventor score
Filing activity: Mar 27, 2014 → Jan 22, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10503658B2 | Page migration with varying granularity | Physics | 8 | Active |
| US10296465B2 | Processor using a level 3 translation lookaside buffer implemented in off-chip or die-stacked dynamic random-access memory | Physics | 7 | Active |
| US9406361B2 | Low latency, high bandwidth memory subsystem incorporating die-stacked DRAM | Physics | 5 | Active |
| US10503655B2 | Data block sizing for channels in a multi-channel high-bandwidth memory | Physics | 3 | Active |
| US10901894B2 | Allocating and accessing memory pages with near and far memory blocks from heterogeneous memories | Physics | 1 | Active |
| US10261915B2 | Intelligently partitioning data cache to allocate space for translation entries | Physics | 1 | Active |
| US11531617B2 | Allocating and accessing memory pages with near and far memory blocks from heterogenous memories | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.