Inventor · Bonn, DE

Jens Vygen

3Patents
2h-index
9Co-inventors
33Inventor score

Filing activity: May 6, 2002 → Feb 18, 2008

Most-cited inventions

PatentTitleAreaCited byStatus
US6904584B2 Method and system for placing logic nodes based on an estimated wiring congestion Physics 10 Expired
US7844931B2 Method and computer system for optimizing the signal time behavior of an electronic circuit design Physics 4 Active
US7886245B2 Structure for optimizing the signal time behavior of an electronic circuit design Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.