Inventor · Palo Alto, CA, US

Kit Lam Cheong

6Patents
3h-index
14Co-inventors
46Inventor score

Filing activity: Oct 22, 2001 → Oct 12, 2009

Most-cited inventions

PatentTitleAreaCited byStatus
US6651235B2 Scalable, partitioning integrated circuit layout system Physics 37 Expired
US6578183B2 Method for generating a partitioned IC layout Physics 26 Expired
US7603643B2 Method and system for conducting design explorations of an integrated circuit Physics 9 Active
US7853905B1 Performing early DFT-aware prototyping of a design Physics 3 Active
US7930675B2 Method and system for implementing timing analysis and optimization of an electronic design based upon extended regions of analysis Physics 3 Active
US8051397B2 Method and system for conducting design explorations of an integrated circuit Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.