Larry B. Weber
3Patents
3h-index
5Co-inventors
43Inventor score
Filing activity: Sep 27, 1983 → Jan 27, 1995
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4959779A | Dual byte order computer architecture a functional unit for handling data sets with differnt byte orders | Physics | 84 | Expired |
| US5398328A | System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory orders | Physics | 57 | Expired |
| US5572713A | System and method for obtaining correct byte addresses by using logical operations on 2 least significant bits of byte address to facilitate compatibility between computer architectures having different memory orders | Physics | 29 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.