Mark Evan Marson
27Patents
2h-index
17Co-inventors
50Inventor score
Filing activity: Dec 10, 2014 → Apr 23, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9923719B2 | Location aware cryptography | Electricity | 8 | Active |
| US10311255B2 | Masked gate logic for resistance to power analysis | Electricity | 3 | Active |
| US10341106B2 | Location aware cryptography | Electricity | 2 | Active |
| US11082224B2 | Location aware cryptography | Electricity | 1 | Active |
| US9569616B2 | Gate-level masking | Electricity | 1 | Active |
| US12099622B2 | Protection of neural networks by obfuscation of activation functions | Physics | 0 | Active |
| US11403014B2 | Managing privileges of different entities for an integrated circuit | Physics | 0 | Active |
| US11706026B2 | Location aware cryptography | Electricity | 0 | Active |
| US12430042B2 | Memory buffer devices with modal encryption | Physics | 0 | Active |
| US11863670B2 | Efficient side-channel-attack-resistant memory encryptor based on key update | Electricity | 0 | Active |
| US12326823B2 | Application authentication and data encryption without stored pre-shared keys | Physics | 0 | Active |
| US11416625B2 | Protecting cryptographic keys stored in non-volatile memory | Electricity | 0 | Active |
| US12362948B2 | Authentication using an ephemeral asymmetric keypair | Electricity | 0 | Active |
| US10747907B2 | Buffer access for side-channel attack resistance | Electricity | 0 | Active |
| US12393702B2 | Protecting cryptographic keys stored in non-volatile memory | Electricity | 0 | Active |
| US11861047B2 | Masked gate logic for resistance to power analysis | Electricity | 0 | Active |
| US12417141B2 | Generating a target data based on a function associated with a physical variation of a device | Electricity | 0 | Active |
| US11996167B2 | Generating random addresses for nonvolatile storage of sensitive data | Physics | 0 | Active |
| US12013751B2 | Generating a target data based on a function associated with a physical variation of a device | Electricity | 0 | Active |
| US11386236B2 | Masked gate logic for resistance to power analysis | Electricity | 0 | Active |
| US12393679B2 | Protection of neural networks by obfuscation of neural network operations and architecture | Physics | 0 | Active |
| US12335365B2 | Protection of transformations by intermediate randomization in cryptographic operations | Physics | 0 | Active |
| US11861051B2 | Buffer access for side-channel attack resistance | Electricity | 0 | Active |
| US12056219B2 | Protection of neural networks by obfuscation of neural network architecture | Physics | 0 | Active |
| US10860229B2 | Managing privileges of different entities for an integrated circuit | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.