Inventor · Tokyo, JP

Masanori Tazunoki

5Patents
5h-index
31Co-inventors
55Inventor score

Filing activity: Sep 13, 1984 → Nov 16, 1992

Most-cited inventions

PatentTitleAreaCited byStatus
US5208782A Semiconductor integrated circuit device having a plurality of memory blocks and a lead on chip (LOC) arrangement Electricity 83 Expired
US4628590A Method of manufacture of a semiconductor device Emerging Cross-Sectional Technologies 75 Expired
US5410507A Special mode control method for dynamic random access memory Physics 38 Expired
US5309011A Wafer scale or full wafer memory system, packaging method thereof, and wafer processing method employed therein Electricity 17 Expired
US5191224A Wafer scale of full wafer memory system, packaging method thereof, and wafer processing method employed therein Electricity 13 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.