Inventor · Hudson, MA, US

Michael A. Callander

6Patents
6h-index
10Co-inventors
52Inventor score

Filing activity: Jun 29, 1990 → Mar 17, 1995

Most-cited inventions

PatentTitleAreaCited byStatus
US5155843A Error transition mode for multi-processor system Mechanical Engineering; Lighting; Heating 118 Expired
US5233616A Write-back cache with ECC protection Physics 66 Expired
US5193163A Two-level protocol for multi-component bus ownership, and implementation in a multi-processor cache write back protocol Physics 53 Expired
US5579504A Multi-processor computer system having shared memory, private cache memories, and invalidate queues having valid bits and flush bits for serializing transactions Physics 42 Expired
US5276852A Method and apparatus for controlling a processor bus used by multiple processor components during writeback cache transactions Physics 37 Expired
US5226150A Apparatus for suppressing an error report from an address for which an error has already been reported Physics 36 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.