Michael Laor
20Patents
14h-index
15Co-inventors
74Inventor score
Filing activity: Aug 4, 1995 → Mar 15, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6980552B1 | Pipelined packet switching and queuing architecture | Electricity | 148 | Expired |
| US6721316B1 | Flexible engine and data structure for packet header processing | Electricity | 133 | Expired |
| US6977930B1 | Pipelined packet switching and queuing architecture | Electricity | 123 | Expired |
| US6778546B1 | High-speed hardware implementation of MDRR algorithm over a large number of queues | Electricity | 119 | Expired |
| US6813243B1 | High-speed hardware implementation of red congestion control algorithm | Electricity | 105 | Expired |
| US6147996A | Pipelined multiple issue packet switch | Electricity | 98 | Expired |
| US8392487B1 | Programmable matrix processor | Physics | 91 | Active |
| US6831923B1 | Pipelined multiple issue packet switch | Electricity | 87 | Expired |
| US7643486B2 | Pipelined packet switching and queuing architecture | Electricity | 61 | Active |
| US6731644B1 | Flexible DMA engine for packet header modification | Electricity | 53 | Expired |
| US7675926B2 | Hierarchical QoS behavioral model | Electricity | 25 | Active |
| US6424649B1 | Synchronous pipelined switch using serial transmission | Electricity | 25 | Expired |
| US7304999B2 | Methods and apparatus for processing packets including distributing packets across multiple packet processing engines and gathering the processed packets from the processing engines | Electricity | 17 | Expired |
| US7554907B1 | High-speed hardware implementation of RED congestion control algorithm | Electricity | 14 | Active |
| US8018937B2 | Pipelined packet switching and queuing architecture | Electricity | 14 | Active |
| US7286525B1 | Synchronous pipelined switch using serial transmission | Electricity | 4 | Expired |
| US9363173B2 | Router and switch architecture | Electricity | 3 | Active |
| US8665875B2 | Pipelined packet switching and queuing architecture | Electricity | 2 | Active |
| US8325403B1 | Optical programmable matrix processor | Physics | 2 | Active |
| US9304272B2 | EO device for processing data signals | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.