Synchronous pipelined switch using serial transmission
US7286525B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2002 |
| Grant date | Oct 23, 2007 |
| Priority date | — |
| Expiry date | Oct 19, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5674
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention provides a method and system for operating a switch, in which incoming data cells are converted from parallel to serial for synchronous input to a switch interconnect, converted from serial to parallel for parallel switching, converted from parallel to serial for synchronous output from the switch interconnect, and converted from serial to parallel for output. The switch interconnect and its input and output interfaces are controlled by a single frequency source, so that all serial data communication paths into and out of the switch interconnect are phase synchronized to within one clock cycle. A single frequency source for the switch system is coupled to the input interfaces, to output interfaces, and to the switch interconnect. The input interfaces each include a PLL which synchronizes to the single frequency source once for all serial communication to the switch interconnect. The switch interconnect includes one PLL for each input interface which synchronizes to the serial input from that input interface, and one PLL for each output interface which synchronizes to the single frequency source once for all serial communication to the output interface. Similarly, the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.