Philippe Hurat
5Patents
3h-index
8Co-inventors
46Inventor score
Filing activity: Apr 5, 2002 → Dec 31, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6745372B2 | Method and apparatus for facilitating process-compliant layout optimization | Emerging Cross-Sectional Technologies | 220 | Expired |
| US6807663B2 | Accelerated layout processing using OPC pre-processing | Physics | 210 | Expired |
| US7458045B2 | Silicon tolerance specification using shapes as design intent markers | Physics | 199 | Expired |
| US8255840B2 | Silicon tolerance specification using shapes as design intent markers | Physics | 1 | Active |
| US11574111B1 | Electronic design tracing and tamper detection using automatically generated layout patterns | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.