Ralph Portillo
4Patents
1h-index
5Co-inventors
30Inventor score
Filing activity: Aug 20, 1996 → Dec 9, 1997
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5880978A | Method and apparatus for creating an output vector from an input vector | Physics | 4 | Expired |
| US6034543A | Programmable logic array structure having reduced parasitic loading | Electricity | 1 | Expired |
| US5977794A | Logic array having interleaved logic planes | Electricity | 0 | Expired |
| US6066959A | Logic array having multi-level logic planes | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.