Inventor · San Jose, CA, US

Robert Burtzlaff

2Patents
2h-index
16Co-inventors
34Inventor score

Filing activity: Sep 24, 2004 → Jan 19, 2007

Most-cited inventions

PatentTitleAreaCited byStatus
US7936062B2 Wafer level chip packaging Electricity 54 Active
US7224056B2 Back-face and edge interconnects for lidded package Electricity 36 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.