Back-face and edge interconnects for lidded package
US7224056B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2004 |
| Grant date | May 29, 2007 |
| Priority date | — |
| Expiry date | Sep 24, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/857
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaged microelectronic device is provided which includes: (a) a unit having a chip with an upwardly-facing front surface and a downwardly-facing rear surface, a lid overlying at least a portion of the front surface of the chip, the lid having a top surface facing upwardly away from the chip and unit connections exposed at the top surface of the lid. At least some of the unit connections are electrically connected to the chip. The packaged microelectronic device also includes a package structure including structure defining package terminals, at least some of the package terminals being electrically connected to the chip. The package structure, the unit or both define a downwardly-facing bottom surface of the package, the terminals being exposed at the bottom surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.