Robert Rumsey
9Patents
3h-index
7Co-inventors
42Inventor score
Filing activity: Apr 1, 2002 → Jan 15, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7979813B2 | Chip-scale package conversion technique for dies | Electricity | 13 | Active |
| US6900538B2 | Integrating chip scale packaging metallization into integrated circuit die structures | Electricity | 8 | Expired |
| US6815128B2 | Box-in-box field-to-field alignment structure | Emerging Cross-Sectional Technologies | 7 | Expired |
| US7211893B2 | Integrating chip scale packaging metallization into integrated circuit die structures | Electricity | 3 | Expired |
| US6762434B2 | Electrical print resolution test die | Electricity | 3 | Expired |
| US7273761B2 | Box-in-box field-to-field alignment structure | Emerging Cross-Sectional Technologies | 2 | Expired |
| US6984531B2 | Electrical field alignment vernier | Physics | 2 | Expired |
| US6649932B2 | Electrical print resolution test die | Electricity | 0 | Expired |
| US6762432B2 | Electrical field alignment vernier | Physics | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.